luna_soc.generate.svd module

Generate a SVD file for SoC designs.

class luna_soc.generate.svd.SVD(memory_map: ~amaranth_soc.memory.MemoryMap, interrupts: dict[int, (<class 'str'>, <class 'amaranth.lib.wiring.Component'>)])

Bases: object

generate(file=None, vendor='luna-soc', name='soc', description=None)